Pauli Frames for Quantum Computer Architectures

Conference paper (2017)

Authors

L. Riesebos FTQC/Bertels Lab
X. Fu Computer Engineering - EEMCS
S. Varsamopoulos FTQC/Bertels Lab
Carmen G. Almudever Computer Engineering - EEMCS
K.L.M. Bertels FTQC/Bertels Lab , Quantum & Computer Engineering
Research Group
FTQC/Bertels Lab
More Info
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Published Date

2017

Language

English

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Research Group

FTQC/Bertels Lab

Abstract

The Pauli frame mechanism allows Pauli gates to be tracked in classical electronics and can relax the timing constraints for error syndrome measurement and error decoding. When building a quantum computer, such a mechanism may be beneficial, and the goal of this paper is not only to study the working principles of a Pauli frame but also to quantify its potential effect on the logical error rate. To this purpose, we implemented and simulated the Pauli frame module which, in principle, can be directly mapped into a hardware implementation. Simulation of a surface code 17 logical qubit has shown that a Pauli frame can reduce the error rate of a logical qubit up to 70% compared to the same logical qubit without Pauli frame when the decoding time equals the error correction time, and maximum parallelism can be obtained.