A 0.45V sub-mW all-digital PLL in 16nm FinFET for bluetooth low-energy (BLE) modulation and instantaneous channel hopping using 32.768kHz reference

Conference paper (2018)

Authors

Min Shueh Yuan Yuan Taiwan Semiconductor Manufacturing Company (TSMC)
Chao Chieh Li Li Taiwan Semiconductor Manufacturing Company (TSMC)
Chia Chun Liao Liao Taiwan Semiconductor Manufacturing Company (TSMC)
Y. Lin Taiwan Semiconductor Manufacturing Company (TSMC)
Chih-Hsien Chang Taiwan Semiconductor Manufacturing Company (TSMC)
R.B. Staszewski University College Dublin
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Published Date

2018

Language

English

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Abstract

The current paradigm of frequency synthesis for short-range wireless transceivers, such as BLE, is to use a crystal oscillator (XO) in the tens-of-MHz range as a frequency reference (FREF) to phase lock an RF oscillator [1-4]. This ensures a sufficiently wide PLL bandwidth of tens to hundreds of kHz to quickly acquire a new channel and to suppress lower-frequency phase noise (PN) of the RF oscillator. The latter requirement can be alleviated by substantially lowering the flicker PN of a digitally controlled oscillator (DCO) thus allowing to freeze its tuning word updates during receive (RX) packets and further directly FM-modulating the DCO during transmit (TX) packets [1]. However, an all-digital PLL (ADPLL) is still needed just to quickly settle the DCO to each new channel.