3-Tier reconfiguration model for FPGAs using hardwired network on chip

Conference paper (2009)

Authors

M.A. Wahlah Computer Engineering - EEMCS
K.G.W. Goossens Computer Engineering - EEMCS
Research Group
Computer Engineering (EEMCS) (TU Delft)
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Published Date

2009

Language

Undefined/Unknown

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Quantum & Computer Engineering

Research Group

Computer Engineering