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Lee, M.J. (author), Ronchini Ximenes, A. (author), Padmanabhan, P. (author), Wang, Tzu Jui (author), Huang, Kuo Chin (author), Yamashita, Yuichiro (author), Yaung, Dun Nian (author), Charbon-Iwasaki-Charbon, E. (author)We present a high-performance back-illuminated three-dimensional stacked single-photon avalanche diode (SPAD), which is implemented in 45-nm CMOS technology for the first time. The SPAD is based on a P<sup>+</sup>/Deep N-well junction with a circular shape, for which N-well is intentionally excluded to achieve a wide depletion region, thus...journal article 2018
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Lee, M.J. (author), Sun, P. (author), Charbon, E. (author)We report on the characterization of single-photon avalanche diodes (SPADs) fabricated in standard 140-nm silicon on insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology. As a methodology for SPAD optimization, a test structure array, called SPAD farm, was realized with several junctions, guard-ring structures, dimensions,...conference paper 2015
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Lee, M.J. (author), Sun, P. (author), Charbon, E. (author)This paper reports on the first implementation of a single-photon avalanche diode (SPAD) in standard silicon on insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology. The SPAD is realized in a circular shape, and it is based on a P+/N-well junction along with a P-well guard-ring structure formed by lateral diffusion of two...journal article 2015
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Lee, M.J. (author), Youn, J.S. (author), Park, K.Y. (author), Choi, W.Y. (author)We present a fully integrated 12.5-Gb/s optical receiver fabricated with standard 0.13-µm complementary metal-oxide-semiconductor (CMOS) technology for 850-nm optical interconnect applications. Our integrated optical receiver includes a newly proposed CMOS-compatible spatially-modulated avalanche photodetector, which provides larger...journal article 2014
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Paul, A. (author), Tettamanzi, G.C. (author), Lee, S. (author), Mehrotra, S.R. (author), Collaert, N. (author), Biesemans, S. (author), Rogge, S. (author), Klimeck, G. (author)Channel conductance measurements can be used as a tool to study thermally activated electron transport in the sub-threshold region of state-of-art FinFETs. Together with theoretical tight-binding (TB) calculations, this technique can be used to understand the dependence of the source-to-channel barrier height (Eb) and the active channel area ...journal article 2011